An integrated circuit comprises a large number of semiconductor devices, such as transistors and capacitors, that are fabricated in a dense pattern on a semiconductor substrate. Groups of integrated circuits are fabricated on a single wafer of semiconductor material, and a very large number of devices are fabricated on each wafer. Typically many of the devices on a wafer contain defects which render a portion of the integrated circuits unsalable, so each integrated circuit must be tested before being shipped to a customer.
Different types of integrated circuits are tested in different ways. Integrated circuit memory devices are tested in groups, for example four or more at a time, by a single automatic test machine. The memory devices contain arrays of memory cells arranged in rows and columns The test machine writes data to the cells in a pattern and then reads the data from the cells. If a the data read from a cell is different from the data that was written to it, the cell is defective. Most memory devices contain redundant cells that are used to replace cells discovered to be defective in such a test.
The process of writing data to and reading data from each cell in a memory device is extremely time consuming and a costly part of the fabrication process. Most methods of testing memory devices read data from a large number of cells and then compress the read data before evaluating the results of the test. The data is compressed in a dedicated test circuit in the memory device that is used only during the test. In a typical test sequence all 1's or all 0's are written to a pattern of cells in the memory device and if all of the tested cells are operating properly the read data will be all 1's or all 0's. However, if one or more of the cells malfunctions the read data will have both 1's and 0's. The test circuit will output a 1 to a selected data pin if the read data is all 1's, and will output a 0 to the data pin if the read data is all 0's. If the read data contains 0's and 1's the data pin is tri-stated by the test circuit. Waiting for the tri-state output to settle, or in other words waiting for the data pin to reach a high-impedance state, adds a significant amount of time to the test process. Even with the use of compressed data a test of a single memory device is time consuming and costly.
There is a need for faster methods of testing integrated circuit memory devices to reduce the cost of fabricating such devices.